| Type | Instance | Vendor | Component | |
|---|---|---|---|---|
| Processor | cpu1 | posedgesoft.ovpworld.org | m16c | |
| Memory | memory | ovpworld.org | ram | |
| Bus | bus1 | (builtin) | address width:32 |
Information for BareMetalM16cSingle
This page provides detailed information about the posedgesoft.ovpworld.org BareMetalM16cSingle Virtual Platform / Virtual Prototype. Table 1: Components in platform
Description
Bare Metal Platform for an M16C Processor.
The bare metal platform instantiates a single M16C processor instance.
The processor operate using big endian data ordering.
It creates contiguous memory from 0x00000000 to 0xFFFFFFFF.
The platform can be passed any application compiled to an M16C elf format.
./platform.
Licensing
Open Source Apache 2.0
Limitations
BareMetal platform for execution of M16C binary files compiled with M16C CrossCompiler toolchain.
Reference
None, baremetal platform definition
Location
The BareMetalM16cSingle virtual platform is located in an Imperas/OVP installation at the VLNV: posedgesoft.ovpworld.org / platform / BareMetalM16cSingle / 1.0.
Platform Summary
Platform Simulation Attributes
Table 2: Platform Simulation Attributes
| Attribute | Value | Description |
|---|---|---|
| stoponctrlc | stoponctrlc | Stop on control-C |
Command Line Control of the Platform
Built-in Arguments
Table 3: Platform Built-in Arguments
| Attribute | Value | Description |
|---|---|---|
| allargs | allargs | The Command line parser will accept the complete imperas argument set. Note that this option is ignored in some Imperas products |
For example: myplatform.exe -help
Some command line arguments require a value to be provided.
For example: myplatform.exe -program myimagefile.elf
Platform Specific Command Line Arguments
No platform specific command line arguments have been specified.
Processor [posedgesoft.ovpworld.org/processor/m16c/1.0] instance: cpu1
Instance Parameters
Several parameters can be specified when a processor is instanced in a platform. For this processor instance 'cpu1' it has been instanced with the following parameters:
Table 4: Processor Instance 'cpu1' Parameters (Configurations)
| Parameter | Value | Description |
|---|---|---|
| mips | 20.0 | The nominal MIPS for the processor |
| semihostvendor | posedgesoft.ovpworld.org | The VLNV vendor name of a Semihost library |
| semihostname | m16cNewlib | The VLNV name of a Semihost library |
Memory Map for processor 'cpu1' bus: 'bus1'
Processor instance 'cpu1' is connected to bus 'bus1' using master port 'INSTRUCTION'.
Processor instance 'cpu1' is connected to bus 'bus1' using master port 'DATA'.
Table 5: Memory Map ( 'cpu1' / 'bus1' [width: 32] )
| Lo Address | Hi Address | Instance | Component |
|---|---|---|---|
| 0x0 | 0xFFFFFFFF | memory | ram |
Net Connections to processor: 'cpu1'
There are no nets connected to this processor.
Information on the BareMetalM16cSingle Virtual Platform can also be found on other web sites :
www.ovpworld.org has the library pages http://www.ovpworld.org/library/wikka.php?wakka=CategoryPlatform
www.imperas.com has more information on the model library
http://www.ovpworld.org: Using OVP Fast Processor Models with OVPsim and other simulators
http://www.ovpworld.org: Creating & Using Platforms and Models in C++ with OP API
http://www.ovpworld.org: ARC Demo Video Presentation
http://www.ovpworld.org: riscvOVPsim. A complete RISC-V ISS for bare-metal software development and Specification Compliance Test Development
Currently available Imperas / OVP Virtual Platforms / Virtual Prototypes for Embedded Software Development and Test Automation.