| Type | Instance | Vendor | Component | |
|---|---|---|---|---|
| Processor | cpu0 | mips.ovpworld.org | mips32_r1r5 | M14K |
| Memory | memory | ovpworld.org | ram | |
| Bus | bus1 | (builtin) | address width:32 |
Information for BareMetalM14KSingle
This page provides detailed information about the mips.ovpworld.org BareMetalM14KSingle Virtual Platform / Virtual Prototype. Table 1: Components in platform
Description
Bare Metal Platform for a MIPS M14K Processor.
The bare metal platform instantiates a single M14K processor instance, using big endian data ordering.
The platform can be passed any application compiled to a MIPS elf format as the argument
It will also allow a port number to be specified to allow the connection of a remote GDB debugger.
platform.OS.exe -program application.CROSS.elf [-port
Licensing
Open Source Apache 2.0
Limitations
BareMetal platform for execution of MIPS M14K binary files compiled with CodeSourcery CrossCompiler toolchain.
Location
The BareMetalM14KSingle virtual platform is located in an Imperas/OVP installation at the VLNV: mips.ovpworld.org / platform / BareMetalM14KSingle / 1.0.
Platform Summary
Command Line Control of the Platform
Built-in Arguments
Table 2: Platform Built-in Arguments
| Attribute | Value | Description |
|---|---|---|
| allargs | allargs | The Command line parser will accept the complete imperas argument set. Note that this option is ignored in some Imperas products |
For example: myplatform.exe -help
Some command line arguments require a value to be provided.
For example: myplatform.exe -program myimagefile.elf
Platform Specific Command Line Arguments
No platform specific command line arguments have been specified.
Processor [mips.ovpworld.org/processor/mips32_r1r5/1.0] instance: cpu0
Processor model type: 'mips32_r1r5' variant 'M14K' definition
Imperas OVP processor models support multiple variants and details of the variants implemented in this model can be found in:
- the Imperas installation located at ImperasLib/source/mips.ovpworld.org/processor/mips32_r1r5/1.0/doc
- the OVP website: OVP_Model_Specific_Information_mips32_r1r5_M14K.pdf
Description
MIPS32 Configurable Processor Model
Licensing
Usage of binary model under license governing simulator usage. Source of model available under Imperas Software License Agreement.
Limitations
If this model is not part of your installation, then it is available for download from www.OVPworld.org/MIPSuser.
Verification
Models have been validated correct as part of the MIPS Verified program and run through the MIPS AVP test programs
Features
Both MIPS32 and microMIPS32 Instruction sets implemented
MMU Type: Fixed Mapping
Vectored interrupts implemented
MCU ASE implemented
Instance Parameters
Several parameters can be specified when a processor is instanced in a platform. For this processor instance 'cpu0' it has been instanced with the following parameters:
Table 3: Processor Instance 'cpu0' Parameters (Configurations)
| Parameter | Value | Description |
|---|---|---|
| endian | big | Select processor endian (big or little) |
| mips | 100 | The nominal MIPS for the processor |
| variant | M14K | The processor variant |
| semihostvendor | mips.ovpworld.org | The VLNV vendor name of a Semihost library |
| semihostlibrary | semihosting | The VLNV library name of a Semihost library |
| semihostname | mips32Newlib | The VLNV name of a Semihost library |
| semihostversion | 1.0 | The VLNV version number of a Semihost library |
Memory Map for processor 'cpu0' bus: 'bus1'
Processor instance 'cpu0' is connected to bus 'bus1' using master port 'INSTRUCTION'.
Processor instance 'cpu0' is connected to bus 'bus1' using master port 'DATA'.
Table 4: Memory Map ( 'cpu0' / 'bus1' [width: 32] )
| Lo Address | Hi Address | Instance | Component |
|---|---|---|---|
| 0x0 | 0xFFFFFFFF | memory | ram |
Net Connections to processor: 'cpu0'
There are no nets connected to this processor.
Information on the BareMetalM14KSingle Virtual Platform can also be found on other web sites :
www.ovpworld.org has the library pages http://www.ovpworld.org/library/wikka.php?wakka=CategoryPlatform
www.imperas.com has more information on the model library
http://www.ovpworld.org: VMI Operating System support (VMI OS) API Reference Guide
http://www.ovpworld.org: Writing C Platforms and Modules using the OVP OP API
http://www.ovpworld.org: ARM Bare Metal Demos Video Presentation
http://www.ovpworld.org: riscvOVPsim. A complete RISC-V ISS for bare-metal software development and Specification Compliance Test Development
Currently available Imperas / OVP Virtual Platforms / Virtual Prototypes for Embedded Software Development and Test Automation.